Contract Verification Engineers

Design Verification Engineers, Contract opportunities in Texas and NorthEastern US. 3+ years industry experience. US residents or valid visa required.

Key Job Functions:
Develop environments for complex functional verification and debug both
functional and environmental errors in the HDL/logic model, using
simulation tools, debug tools and programming skills, based on in-depth understanding of the architecture and HDL/logical design. Develop an automated regression infrastructure setup for functional verification of high speed processor type designs. Develop/run directed tests for current and new functional features and develop/use random excercisors, to validate functionality of processor type system designs. Debug regression fails at the RTL and gate level.
Software infrastructure for validation of architecture correctness.
Directed and Random functional test environment development and use
Experience with functional/power/performance verification using
simulation and emulation environments
Create test plans for complex IPs include multiple processors
Developing test benches in OVM, SystemVerilog and/or C++, applying
pseudo-random test generators, developing System Verilog/C/assembly tests,
analyzing coverage and design-for-test on next generation SOC chip
projects.
Knowledge with Verilog SystemVerilog, HDL, programming in Perl, C/C++,
logic simulation is a requirement. Direct experience with OVM simulation
environment is a strong plus. Knowledge of computer and peripheral
architectures is also required.

contact: Kathy@Xpeerant.com

Job Opportunity with US Based Product Development Company, Bangalore

Work as part of the Design Technology team to be part of development and support of digital IP designs to Product Company worldwide design teams. Primary responsibility includes build new digital IP components, support & maintenance of all digital IPs in the library, support design & implementation teams in different testchip programs in IP integration aspects.

Job functions include:
-Creation of verilog based RTL design, including micro-architecture definition and coding for DFT, synthesis rule compliance.
-Drive IP use model, revision control process and manage the IP release process to different design teams.
-Support bug fixes, design enhancements to keep all the IPs in library up-to-date.
-Work closely with verification team to ensure that exhaustive verification all IPs are done.
-Creating documentation to aid easy re-use of IP
-Work closely with the circuit, logic and implementation teams and support re-use & customization of IP.

Requirements:
-Bachelors or Masters in Electrical / Electronic Engineering with at least 3-4 years of experience in IP development and integration support.
-Hands on experience in Verilog based digital design creation.
-Prior memory technology (DDRx / GDDRx / LPDDRx) experience preferred.  
-Exposure to scripting/programming ability using PERL, MAKEFILE.
-Good familiarity with usage of configuration management systems (any one of: DesignSync, ClearCase, Perforce, ICManage
-Hands on experience / support in tape-out of at least two chips would be added advantage.

Abilities:
-Work effectively and independently in a multi-site, multi-cultural environment
-Self-motivated team player with strong organizational, time management and communication skills.

Note: we will process your CV with your due Consent Only
Do send your Update CV & Please mention below details

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contact: nalini@techpointsolutions.com