Openings with AMD Bangalore and Hyderabad
1. SOC Verification - SMTS / Manager
As an SOC Verification Manager, You will be responsible for leading the verification of next generation Fusion SOC's in the Processor Silicon Engineering (PSE) Group at AMD. This is a hands-on technical management position with tremendous potential for growth and visibility in the organization. Ideal position for a candidate who wants to directly participate and influence the state-of-the-art verification methodologies
Your responsibilities will include, but not limited to:
§ Drive the development of Verification test plans, Coverage metrics, Verification components and Stimulus generation
§ Work closely with Verification Center of Excellence (VCoE) to enable newer verification methodologies and continuous process improvement
§ Work with technical leads in both verification & debug and provide direction on critical decisions
§ Assign resources and schedule tasks per program priorities. Work collaboratively with other functional leads/managers to prioritize deliverables
§ Interact with IP teams globally and ensure the deliverables and schedules are aligned per SOC program goals
§ Track the infrastructure needs – Compute farms and Disk space
§ Provide periodic updates to Program Management on progress and escalate issues on time
§ Mentor and guide the team development, provide performance feedback to the team. Provide career direction to team members
§ Provide strong technical leadership in problem solving and planning
Experience & Skills:
§ 10-15 years of experience in IP/SOC verification and atleast 3-5 years of recent experience in leading verification of processor based complex SOCs
§ Possess a Bachelors or Masters degree in Computer Engineering or Electrical Engineering
§ Atleast 2-3 years of direct people management and mentoring
§ Demonstrated successful completion of atleast 1-2 SOC verification projects either as a verification lead or manager
§ Ability to define and track verification metrics for complex verification projects
§ Able to review and critique the verification plans and coverage goals by understanding the SOC system level view and architecture
§ Thorough understanding of state-of-the-art verification methodologies, tools and languages
§ Hands-on working knowledge on any of following; Coverage based verification, Assertion based verification, VMM/OVM, VCS/NCSIM, Debussy, System Verilog
§ C/PERL/TCL and Unix scripting experience is a plus
§ Direct experience on x86 or ARM processor based SOC verification is a plus, but not required
§ Post silicon debug and validation experience is a plus
§ Excellent communication skills and ability to communicate information and ideas succinctly
§ Ability to solve complex problems by reviewing related information to develop and evaluate options and implement solutions
2. SOC Verification – MTS /Sr. Engineer
8 -12 yrs experience in ASIC/SOC design and verification
Exposure to processor verification is highly preferred
Must have taped-out at least one successful SOC
Appropriate candidate will have the skills of:
Verilog/High level verification
SOC verification and random test generation
Testplanning & test writing especially for processor verification
Exposure to tools like: VCS/NCSim, Debussy
Perl and scripting
Knowledge/exposure to complete SOC tape-out flow
3. SOC Design - SMTS/Manager
10+ years engineering experience in an IP/SOC product development environment with evidence and willingness of doing Technical Leadership and engineering management of a team of highly skilled engineers
Good university Degree in Microelectronics, Electrical Engineering or Computer Science. Other Science graduates would be considered if they have relevant experience
Should be an expert in CDC/LEDA/RTL/Synthesis. Understanding of low power is a plus
Experience and strong aptitude for Line-Management/People Management
Good understanding of resource management and appreciation for operational aspects such as budgeting, cost management.
Experience in recruitment and team building as well as performance management for engineers
Familiar with Design Verification/validation best practices such as Test Plan development, Testbench development and measurable execution thereof
Familiar with Microprocessor and/or SoC Architecture
Planning and coordination of resources and team members to meet SoC Design/Implementation goals on time and within budget
Ensure that requirements are accurately transferred into a meaningful engineering project. Determine appropriate timescales, provide project plans and appropriate input to specifications, and use the assigned engineering resource creatively to ensure that all engineering commitments are delivered successfully
Maintain a competent knowledge of company processes in order to work constructively within given standards and methodologies
Monitor inter-project dependencies and risks, assist in the resolution of differences where necessary, to achieve greater success.
Work with stakeholders; informing, communicating progress and managing expectations.
4. SOC Design - MTS
8–10 yrs of experience
Candidate should posses good mix of front end skills with a good working experience on power estimation and low power design techniques.
• Sound knowledge of low power methodology and power estimation procedures
• Working experience with power estimation tools (Power Theater/PT-PX) and CLP flow
• Hands on experience with Low power methodologies using UPF/CPF
• Needs to have sound fundamentals in RTL design and micro architecture
• Needs hands on experience with LEC/Lint/CDC
• Good understanding on Synthesis/STA flows
• Good Perl/TCL scripting skills
• Experience working with global teams
5. Program Manager Fusion SOC
Job Description: As a Program Manager in the Processor solutions Engineering (PSE) Team you will be responsible for helping drive our next generation fusion SOC programs.
Responsibilities will include:
§ Defining and managing key product deliverables/schedules and driving cross functional activities
§ Managing horizontally across several functional organizations is a key job function
§ Working hand-in-hand with engineering counterparts across the global sites to plan/align IP schedules and delivery, extensive interactions within the PSE SOC organization to ensure alignment of program goals
§ Support in the development of project plans, schedules, and must be able to develop and improve processes for project tracking and risk mitigation
§ Support the Engineering management in planning of project Human and Computing resource needs
§ Support Engineering management to drive execution excellence, including key metrics like Time-to-Market, R&D Efficiency, and Silicon Quality Indicators
§ Work collaboratively with the AMD Program Management community to track Key metrics and help continuous process improvement.
§ Interpret/understand business directions, explaining tactical details, and recommending solutions regarding complex program situations
Experience & Skill Set:
B.E/B.Tech, or M.E/M.Tech in Engineering (EE, Computer Science)
10+ years Project Management experience in industry
PMP certification is a plus, but not required
Good presentation and leadership skills; with ability to lead technical discussions
Strong interpersonal skills
Outstanding written and oral communication skills
Experience in managing complex, interrelated projects, programs, and functions
Hands-on experience in IP/SOC development in any functional area; Design Verification, Design Integration, Physical design and Post silicon validation
Working knowledge across multiple engineering disciplines (i.e. Boards, Thermal, Packaging, Process Technology, Product Engineering, Software) is desirable
Team player with a commitment to meeting deadlines and an aptitude to thrive in a fast paced multi-tasking environment
SoC/Processor Verification: 4+ years
Preferred Education and experience: The Candidate should have a Master's with 5+ years of experience or Bachelor of Engineering with 7+ years of experience in electronics or Computer engineering. Experience in large ASIC or processor design/verification, SoC/Processor architecture and micro architecture, C/C++ programming language, scripting languages, and simulation and debug tools is a must. Candidate should have experience in SoC Verification a large ASIC/Processor, design and debug using Verilog/system Verilog (or equivalent HVL). Processor verification experience is an added advantage. Ability to technically lead a team of highly skilled engineers.
Primary Purpose: Primary job function is to provide technical leadership to the verification team and own/drive one or more area/feature verification at full chip level and meet grade level expectations
Key Job Functions: Own and verify one or more area/feature at full chip level. Play a driving role in verification environment development (detailed test plans, checkers, irritators, models, stimuli), debug and root cause failures and innovation in SoC verification work flow. Providing technical leadership to junior engineers in the team including mentorship. Represent verification team in various forums and work with overseas teams. Good team work to ensure timely and quality deliverables. Meet grade level expectations (technical leadership, innovation, supervision requirement, ownership, problem solving, mentoring).
Job Location: Bangalore, Hyderabad
Please revert back with your interest in it ASAP with the following details
CTC:
ECTC:
NP:
Mobile No:
Alt Mail ID:
2 Professional References (Please do mention Email ID and Contact No:
Thanks & Regards,
Sailaja.K
Techpoint Solutions Pvt Ltd
040-44354435
mailto:sailaja@techpointsolutions.com
1. SOC Verification - SMTS / Manager
As an SOC Verification Manager, You will be responsible for leading the verification of next generation Fusion SOC's in the Processor Silicon Engineering (PSE) Group at AMD. This is a hands-on technical management position with tremendous potential for growth and visibility in the organization. Ideal position for a candidate who wants to directly participate and influence the state-of-the-art verification methodologies
Your responsibilities will include, but not limited to:
§ Drive the development of Verification test plans, Coverage metrics, Verification components and Stimulus generation
§ Work closely with Verification Center of Excellence (VCoE) to enable newer verification methodologies and continuous process improvement
§ Work with technical leads in both verification & debug and provide direction on critical decisions
§ Assign resources and schedule tasks per program priorities. Work collaboratively with other functional leads/managers to prioritize deliverables
§ Interact with IP teams globally and ensure the deliverables and schedules are aligned per SOC program goals
§ Track the infrastructure needs – Compute farms and Disk space
§ Provide periodic updates to Program Management on progress and escalate issues on time
§ Mentor and guide the team development, provide performance feedback to the team. Provide career direction to team members
§ Provide strong technical leadership in problem solving and planning
Experience & Skills:
§ 10-15 years of experience in IP/SOC verification and atleast 3-5 years of recent experience in leading verification of processor based complex SOCs
§ Possess a Bachelors or Masters degree in Computer Engineering or Electrical Engineering
§ Atleast 2-3 years of direct people management and mentoring
§ Demonstrated successful completion of atleast 1-2 SOC verification projects either as a verification lead or manager
§ Ability to define and track verification metrics for complex verification projects
§ Able to review and critique the verification plans and coverage goals by understanding the SOC system level view and architecture
§ Thorough understanding of state-of-the-art verification methodologies, tools and languages
§ Hands-on working knowledge on any of following; Coverage based verification, Assertion based verification, VMM/OVM, VCS/NCSIM, Debussy, System Verilog
§ C/PERL/TCL and Unix scripting experience is a plus
§ Direct experience on x86 or ARM processor based SOC verification is a plus, but not required
§ Post silicon debug and validation experience is a plus
§ Excellent communication skills and ability to communicate information and ideas succinctly
§ Ability to solve complex problems by reviewing related information to develop and evaluate options and implement solutions
2. SOC Verification – MTS /Sr. Engineer
8 -12 yrs experience in ASIC/SOC design and verification
Exposure to processor verification is highly preferred
Must have taped-out at least one successful SOC
Appropriate candidate will have the skills of:
Verilog/High level verification
SOC verification and random test generation
Testplanning & test writing especially for processor verification
Exposure to tools like: VCS/NCSim, Debussy
Perl and scripting
Knowledge/exposure to complete SOC tape-out flow
3. SOC Design - SMTS/Manager
10+ years engineering experience in an IP/SOC product development environment with evidence and willingness of doing Technical Leadership and engineering management of a team of highly skilled engineers
Good university Degree in Microelectronics, Electrical Engineering or Computer Science. Other Science graduates would be considered if they have relevant experience
Should be an expert in CDC/LEDA/RTL/Synthesis. Understanding of low power is a plus
Experience and strong aptitude for Line-Management/People Management
Good understanding of resource management and appreciation for operational aspects such as budgeting, cost management.
Experience in recruitment and team building as well as performance management for engineers
Familiar with Design Verification/validation best practices such as Test Plan development, Testbench development and measurable execution thereof
Familiar with Microprocessor and/or SoC Architecture
Planning and coordination of resources and team members to meet SoC Design/Implementation goals on time and within budget
Ensure that requirements are accurately transferred into a meaningful engineering project. Determine appropriate timescales, provide project plans and appropriate input to specifications, and use the assigned engineering resource creatively to ensure that all engineering commitments are delivered successfully
Maintain a competent knowledge of company processes in order to work constructively within given standards and methodologies
Monitor inter-project dependencies and risks, assist in the resolution of differences where necessary, to achieve greater success.
Work with stakeholders; informing, communicating progress and managing expectations.
4. SOC Design - MTS
8–10 yrs of experience
Candidate should posses good mix of front end skills with a good working experience on power estimation and low power design techniques.
• Sound knowledge of low power methodology and power estimation procedures
• Working experience with power estimation tools (Power Theater/PT-PX) and CLP flow
• Hands on experience with Low power methodologies using UPF/CPF
• Needs to have sound fundamentals in RTL design and micro architecture
• Needs hands on experience with LEC/Lint/CDC
• Good understanding on Synthesis/STA flows
• Good Perl/TCL scripting skills
• Experience working with global teams
5. Program Manager Fusion SOC
Job Description: As a Program Manager in the Processor solutions Engineering (PSE) Team you will be responsible for helping drive our next generation fusion SOC programs.
Responsibilities will include:
§ Defining and managing key product deliverables/schedules and driving cross functional activities
§ Managing horizontally across several functional organizations is a key job function
§ Working hand-in-hand with engineering counterparts across the global sites to plan/align IP schedules and delivery, extensive interactions within the PSE SOC organization to ensure alignment of program goals
§ Support in the development of project plans, schedules, and must be able to develop and improve processes for project tracking and risk mitigation
§ Support the Engineering management in planning of project Human and Computing resource needs
§ Support Engineering management to drive execution excellence, including key metrics like Time-to-Market, R&D Efficiency, and Silicon Quality Indicators
§ Work collaboratively with the AMD Program Management community to track Key metrics and help continuous process improvement.
§ Interpret/understand business directions, explaining tactical details, and recommending solutions regarding complex program situations
Experience & Skill Set:
B.E/B.Tech, or M.E/M.Tech in Engineering (EE, Computer Science)
10+ years Project Management experience in industry
PMP certification is a plus, but not required
Good presentation and leadership skills; with ability to lead technical discussions
Strong interpersonal skills
Outstanding written and oral communication skills
Experience in managing complex, interrelated projects, programs, and functions
Hands-on experience in IP/SOC development in any functional area; Design Verification, Design Integration, Physical design and Post silicon validation
Working knowledge across multiple engineering disciplines (i.e. Boards, Thermal, Packaging, Process Technology, Product Engineering, Software) is desirable
Team player with a commitment to meeting deadlines and an aptitude to thrive in a fast paced multi-tasking environment
SoC/Processor Verification: 4+ years
Preferred Education and experience: The Candidate should have a Master's with 5+ years of experience or Bachelor of Engineering with 7+ years of experience in electronics or Computer engineering. Experience in large ASIC or processor design/verification, SoC/Processor architecture and micro architecture, C/C++ programming language, scripting languages, and simulation and debug tools is a must. Candidate should have experience in SoC Verification a large ASIC/Processor, design and debug using Verilog/system Verilog (or equivalent HVL). Processor verification experience is an added advantage. Ability to technically lead a team of highly skilled engineers.
Primary Purpose: Primary job function is to provide technical leadership to the verification team and own/drive one or more area/feature verification at full chip level and meet grade level expectations
Key Job Functions: Own and verify one or more area/feature at full chip level. Play a driving role in verification environment development (detailed test plans, checkers, irritators, models, stimuli), debug and root cause failures and innovation in SoC verification work flow. Providing technical leadership to junior engineers in the team including mentorship. Represent verification team in various forums and work with overseas teams. Good team work to ensure timely and quality deliverables. Meet grade level expectations (technical leadership, innovation, supervision requirement, ownership, problem solving, mentoring).
Job Location: Bangalore, Hyderabad
Please revert back with your interest in it ASAP with the following details
CTC:
ECTC:
NP:
Mobile No:
Alt Mail ID:
2 Professional References (Please do mention Email ID and Contact No:
Thanks & Regards,
Sailaja.K
Techpoint Solutions Pvt Ltd
040-44354435
mailto:sailaja@techpointsolutions.com
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