The job description is as follows:
Memory Layout: Post: Engineer or Sr.Engineer: Exp:1-5, Location : Noida
Desired Candidate Profile:
* Good experience on Memory layout.
* Basic concept of memory like SRAM,DRAM,bitcell etc and memory compiler.
* Good experience of working on Virtuso LE/XL,calibre/assura,DRC,LVS.
* Knowledge of SKILL and Extraction is a plus
Memory Characterization/Pkg, Post: Engineer or Sr Enginner, Exp: 1-5, Location: Noida
Desired Candidate Profile :
* Good understanding of cmos process & transistor level concepts .
* Knowledge of spice level simulator is most preferred.
* Knowledge of scripting Tcl/Perl is preferred. * Good knowledge of Memory blocks and controllers .
* Knowledge of SRAM, DRAM.
* Experience on memory characterization would be prefered. Tools used:Eldo,HSPICE,spectra.
To refer a friend log on to SPOG website and click refer/apply and provide us their name, email id and phone no.
Regards,
Sunistha
http://spog.utkrist.com/.
frs@utkrist.com
#9972936982
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